In recent years, the downscaling of memory cells in a planar nonvolatile memory device has been approaching a limit. Therefore, many devices have been proposed as a next-generation memory device in which the memory cells are arranged three-dimensionally. Among these, for higher integration, it is considered that a cross-point memory device is advantageous in which a word line interconnect layer including multiple word lines and a bit line interconnect layer including multiple bit lines are stacked alternately and variable resistance members are connected between the word lines and the bit lines.